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Assembly and Test, Bumping, Packaging semi conductor manufacturing, Assembly, Inspection, Toll processing, Image analysis transport manufacturing
Description
ㆍEfficient Integration : Mother and Daughter communicate efficiently at faster speed, lower inductance, and lower electrical resistance, ideally suited for high speed signal applications, e.g. Si photonics
ㆍMulti Die Capability : Mix of devices can be attached to create fully functional blocks, e.g. attaching a laser to Si photonics chip set creates the platform for an optical transceiver
ㆍSupport Legacy : Once sawn, the chip stack can be assembled into a various types of packages e.g. QSFP, QFN, fcCSP, PBGA, etc.
ㆍMultiple Structures : For example CoW POSSUMTM, CoW+WB, etc.
ㆍObjective
ㆍTo develop SFA SEMICON internal TV for CoC / CoS / CoW process (development) SFA SEMICON qualification
ㆍTo attest and document SFA SEMICON CoC/CoW Design Rule
ㆍTo attest the thermal, electrical, and mechanical aspects of the CoC/CoW design
Application
ㆍMobile Phone, HDTV, Camcoder, Wireless Home Appliances, Sensor, Etc
ㆍTouch screen controllers / Antenna
ㆍPower amplifiers
ㆍModem IC, Wi-Fi & Bluetoos, RFIC , PMIC
ㆍApplication processor
Feature
ㆍAll standard Cu pillar & solder bump
ㆍFine pitch Cu pillar & u-bump
ㆍNo general under-fill material
ㆍPassivation barrier type
ㆍNSOP(Non Solder on Pad) type